Scale up + scale out optical connectivity for AI infrastructure


The Problem
The Solution
The Result
Our Solutions
MicroLED Optical Engine
1–2 pJ/bit energy target; BER ≤10⁻¹⁰
1.6T module power reduction potential: ~30W → ~1.6W
No modulator, WDM, DSP, heater, or temperature-control units
Monolithic + heterogeneous integration
Narrow-strip optical transmission architecture
VC heat management inside the 3D package
VCSEL Optical Engine
Reduces DSP dependency
1.6T / 3.2T NPO/OBO plus AOC roadmap
100+ Tbps bandwidth architecture potential
Low-power CMOS EIC with smaller die size
Patent-pending RDL interposer + VC thermal management
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